
BCM87400: 7-nm 400GbE PAM-4 PHY (8:4) Product Brief
The BCM87400 leverages Broadcom''s market-leading PAM-4 PHY technology platform and represents the industry''s first 400-Gb/s
Pulse-Amplitude Modulation 4-Level (PAM4) is a multilevel signaling technique that uses four distinct voltage levels to represent two bits per symbol (00, 01, 10, 11), unlike traditional NRZ (PAM2) which uses two levels for one bit per symbol . This allows PAM4 to double the data rate for a given channel bandwidth, making it ideal for high-speed Ethernet links such as 400GbE, 800GbE, and 1.6T Ethernet, as well as PCIe 6.0 . However, PAM4 is more susceptible to noise, jitter, and intersymbol interference, requiring careful design and forward error correction (FEC) to maintain signal integrity .
Airport core switches, which handle high-throughput traffic between network aggregation points, benefit from PAM4 because it supports higher lane speeds without increasing the physical channel bandwidth. Modern switches use PAM4 SerDes (Serializer/Deserializer) technology to achieve 112G or 224G per lane, enabling 400GbE or 800GbE switch fabrics . For example, Broadcom's BCM87400 PHY supports four lanes of 112-Gb/s PAM4 at 56 Gbaud, providing low-power, high-performance 400GbE connectivity .
High-speed PAM4 links require ultra-low jitter clocks to maintain signal fidelity. For instance, TI's LMK5B33216 clock generator achieves 42fs RMS jitter, meeting the stringent requirements of 112G and 224G PAM4 SerDes used in data center switches . Proper clocking, pre-emphasis, and equalization are critical to compensate for channel loss and optical impairments, ensuring reliable operation across backplanes, cables, and optical modules .

The BCM87400 leverages Broadcom''s market-leading PAM-4 PHY technology platform and represents the industry''s first 400-Gb/s

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